释义 |
Wallace tree 基本例句 华莱士树 This multiplier used modified Booth Algorithm,Wallace treeand 4- 2 compressor.乘法器采用改进的Booth算法,简化了部分积符号扩展,使用Wallace树结构和4-2压缩器对部分积归约。 The multiplier of circuit optimized by CSD coding andWallace tree,effectively saves logic resources,and enhances the frequency.并通过对乘法器采用CSD码和Wallace树进行优化;进一步减少逻辑资源;以及提高了整个模块的最高运行速度. A 32-bit multiplier is presented in which many methods, such as Booth algorithm, 4-2 compressors,Wallace treealgorithm,and carry-lookahead adder, are applied, which results in high speed performance.该文提出的32位乘法器,采用了Booth编码、4-2压缩器、Wallace树算法以及超前进位加法器等多种算法和技术,在节约面积的同时,获得了高速度的性能。 |