| 释义 |
TLBCOCA⁶³⁴⁸²
基本例句
OLE库文件,其中存放了OLE自动化对象的数据类型、模块和接口定义,自动化服务器通过TLB文件就能了解自动化对象的使用方法。
A standalone type library typically has a. tlb extension.
独立类型库通常以. tlb 为扩展名。 ibm
A TLB is a relatively small cache area that stores the most- recent address translation in anticipation of its potential reuse.
TLB是一个较小的缓存区域，用于存储最近的地址转换，以便再次使用。 ibm
An increase in TLB hit rate improves the CPI metric and, therefore, performance of that program.
提高 TLB命中率可以提高 CPI度量，从而也提高程序的性能。 ibm
Second, in the procedure of random program generation we solved the memory boundary checking, TLB entries replacement and exception handling for the high quality test program generation.
在验证程序的生成过程中解决了随机程序存储边界约束问题，建立了 TLB换页机制，从而使随机验证程序的生成合理运行在更广泛的存储空间； search.gucas.ac.cn
Takes a list of one or more type library names or . tlb files and resolves those type libraries to locations on disk.
当您提供越多资讯以唯一识别型别程式库时，工作就越可能解析至磁碟上的正确档案。 microsoft
The performance improvement is due to the reduction of Translation Lookaside Buffer TLB misses, which occurs because the TLB can now map to a much larger virtual memory range.
性能之所以得到了改进，是因为提高了 Translation Lookaside Buffer TLB的命中率，这是因为 TLB可以映射到更大的虚拟内存范围。 ibm
The profiling table provides the percentage and number of samples collected for specified processor events such as the number of cache line misses, Transition Lookaside Buffer TLB misses, and so on.
评测表提供为特定的处理器事件收集的采样的百分数或数量，比如高速缓存线路故障的数量、传输后备缓存 TLB故障的数量，等等。 ibm
The TLB miss overhead represents one important component of the overall CPI metric.
TLB失误的开销是整个 CPI度量中的一个重要部分。 ibm
We have a study on the register assignment and the low-power design of the components of SOC system, meanwhile we design a low-power TLB module.
从静态和动态功耗两个方面入手，从编译角度对寄存器文件分配方案引起的功耗降低做了一系列的研究； keyanjijin
“ In response to all he has done for us, let us outdo each other in being helpful and kind to each other and in doing good” Hebrews 10:24 TLB.
为了响应他为我们做的一切，让我们彼此相顾，激发爱心、勉励行善。 yeeyan
A TLB miss requires accessing a page table that is stored in the main memory, which consumes considerably more processor cycles.
如果 TLB没有命中，那么就需要访问存储在主存中的页表，而这样做需要消耗相当多的处理器周期。 ibm
But this design choice ignores the effect of TLB misses.
但是这样的设计忽略了 TLB失配对系统性能的影响； cnki
For I am convinced that nothing can separate us from His love TLB.
因为我深信，没有一件事物能叫我们与他的爱隔绝。 godbuild
However, because of on- chip space limitations, the TLB size can not be increased proportionally.
然而，由于芯片空间的限制， TLB的大小不能成比例地增加。 ibm
Ideally, the working set of each process is stored in the TLB. Otherwise there is a high degree of page faults.
理想地，每进程的工作集存储在 TLB中。否则有很高的缺页率。 www.ccie.gxu.edu.cn
If there are too many TLB misses, your code read data in large address range.
如果发生了很多 TLB失效，就说明代码读取大地址范围中的数据。 ibm
In addition, a DVS technology is used reducing the leakage power in the TLB's memory cells by90%.
此外，通过引入DVS技术将 TLB存储单元中的漏电功耗减少90%以上。 cnki
In order to optimize performance, including speed and the usage of its memory, CPU usually hires a Translation Lookaside Buffer TLB to translate the virtual address into physical address.
为了提高 CPU的速度和更有效的管理物理内存，一般都采用转换查找缓冲器 TLB将虚拟地址转换为物理地址。 dictall
Large pages can accommodate more memory in fewer actual pages, so as more large pages are used, more memory can be referenced through the TLB than with smaller page sizes.
大内存页可以用更少的实际页来提供更多的内存，相当于较小的页大小，使用的大内存页越多，就有越多的内存可以通过 TLB引用。 ibm
Locking TLB entries can ensure that a memory access to a given region never incurs the penalty of a page table walk.
锁定 TLB输入能确保对于给出区域的内存读取绝不会导致页表移动的掉失。21ic
One option is to increase the TLB size.
一种选择是增加 TLB大小。 ibm
The fewer pages would mean that the TLB process would have a higher hit ratio and therefore improved performance.
页数越少，意味着 TLB进程将具有更高的命中率，因而性能更好。 ibm
This difference in performance gain is predictable because the pressure on the TLB cache increases as the size of the database and the memory assigned to the DB2 buffer pools increases.
这两组测试得到的性能结果的不同是可以预测的，因为随着数据库和分配给 DB2缓冲池的内存的增加， TLB缓存上的压力也随之增加。 ibm
This is because TLB is able to map a larger virtual memory range.
这是因为 TLB能够映射更大的虚拟内存范围。 ibm
TLB is the cache holding the mapping information from the virtual address to the physical page in memory.
TLB缓存包含从虚拟地址到内存中物理页面的映射信息。 ibm
TLB cache entry reuse cache hit equates to quicker address translation and subsequently faster access to physical memory.
TLB缓存条目重用缓存命中意味着更快的地址转换，还意味着对物理内存的更快的访问。 ibm
TLB is used to try and retrieve translation work that has already occurred, and this is the first place the operating system will look for a process's translated memory segment.
TLB用于尝试和检索已经发生的转换工作，而这是操作系统第一次查找进程的已转换内存段的地方。 ibm |