| 释义 |
integrated circuit design
基本例句
集成电路设计
Interconnection delay has become a dominant factor in IC design.互连线时延是集成电路设计中非常重要的影响因素。
The using of EDA can reduce the design period, design cost and increase the rate of final products.利用计算机软件进行辅助设计会大大减少集成电路设计时间，降低设计成本，提高成品率。 |